1. Field of the Invention
This disclosure relates generally to comparators, and in particular, to comparators and circuits based on current copiers.
2. Description of the Related Art
In some comparators such as a standard differential pair comparator, input device threshold mismatch and transconductive parameter mismatch causes voltage offsets. Comparators using current mirrors have such voltage offsets, since current mirror load contributes to offset and must be adjusted for accurate operation. Offset voltages are often stored on capacitors and subsequently subtracted from input signals to adjust for the offset. The storage and subtraction process may be slow, since comparators are generally placed in a closed feedback loop arrangement during the offset cancellation process. In use with analog-to-digital (A/D) and digital-to-analog (D/A) converters, such slow adjustment for offset limits the speed of the conversion process.
In some comparator circuits which adjust for offset effects, currents may be stored so as to be proportional to a reference, with an input signal being fed to an input device, and clock feedthrough suppressed. However, such comparators are also subject to such slow adjustment of offset. Offset adjustment is also required for other circuits such as flash converters and the like. It would be advantageous to reduce or cancel offset effects as well as increase comparison processing speed without closed loop calibration and without direct switch charge injection at the input of the comparator.